1. Technical Field
The present invention relates generally to exposure equipment and related control methods useful in the manufacture of semiconductor devices. More particularly, the invention relates to exposure equipment and related control methods adapted to detect an image pattern on a reticle and verify its overlay or accuracy.
This application claims the benefit of Korean Patent Application No. 2004-79696, filed Oct. 6, 2004, the disclosure of which is hereby incorporated by reference in its entirety.
2. Discussion of the Related Art
The manufacture of semiconductor devices is a long and complicated process. It generally starts with the fabrication of defect-free silicon wafer. Before actually forming circuits and elements on the wafer it must be carefully machined, polished and cleaned. Thereafter, a multiplicity of specific processes are sequentially applied to the wafer in order to form the multi-layer circuits and elements that constitute a contemporary semiconductor device. Such processes are conventional in nature and well understood. They include, as ready examples, processes related to photolithography, etching, thin film deposition, diffusion, etc.
Photolithography is a well known process that comes in a variety of types and capabilities. Generally speaking, however, a photolithography process transfers geometric shapes defined by a mask onto the surface of the silicon wafer being processed. The steps typically involved in a photolithographic process include; wafer cleaning, barrier layer formation, photoresist application, soft baking, mask alignment, exposure and development, and hard baking.
Photolithography exposure is a process of transferring a circuit pattern formed on a reticle onto the surface of a wafer, wherein the wafer has a photosensitive film applied thereon. The circuit pattern is transferred through an optical system which optically reduces it during transfer. The photolithography exposure process is typically implemented using exposure equipment, such as a scanner or stepper.
The minutely detailed patterns that define the circuits of a semiconductor device are contained in one or more reticles carefully positioned within the exposure equipment. Highly accurate positioning of the reticle within the exposure equipment is required in order to accurately “transfer” the circuit patterns.
A typical reticle is formed from chrome on a quartz substrate. Reticles correspond one-for-one with particular circuits or circuit portions to be transferred onto a wafer.
Contemporary semiconductor devices generally include a number of layers stacked vertically one on top of the other. Since each layer contains minutely detailed circuitry, many reticles must be used in some coherent combination to properly manufacture a single semiconductor device. Since the minutely detailed circuitry must often be connected upwards or downward with circuitry formed on an adjacent layer, the various reticles must accurately “match-up,” not only laterally within a single layer, but also vertically between layers. This accuracy of inter-reticle match-up (i.e., the state of overlay matching) is a common consideration referred to as “overlay.”
Careful examination and verification of overlay is essential. The issue of overlay accuracy has become all the more important as integration densities for contemporary semiconductor devices have increased.
Conventionally, overlay accuracy was verified by an operator directly examining the respective reticles using an electron microscope or similar device. Overlay marks formed on respective reticles are used to aid this manually performed, visual verification process.
Unfortunately, mechanical vibrations and other factors integral to the operation of exposure equipment generally result in some overlay matching error. Defects in one or more reticles result in additional overlay matching error. Nonetheless, up to the present, no exposure equipment exists which is capable of automatically examining overlay for an entire circuitry pattern formed by the use of multiple reticles.
As a result, equipment operators are forced to rely on overlay marks as rough guides to determining overlay accuracy. This approach yields, at best, an indirectly estimate of overlay accuracy.
Additionally, conventional exposure equipment really doesn't have the ability to examine an entire circuit pattern formed from multiple reticles. This inability greatly limits the ability of equipment operators to verify reticle matching and overall circuit transfer accuracy.